That current is negligible I think, you should find another reason(s). Area, cost, linearity, operation range, mismatch, maybe share these results with true comparison.if we compare this circuit when it is working with the 3.3 V then it seems better than the wide swing mirror counterpart as the latter one needs an additional branch current to supply the biasing diode transistor
Why not used another sooch current mirror from PMOS to compare?for the upper current source I connectede wide swing mirror to provide the current
This is not really true. When I designed high swing mirror none of the transistors were in triode region, over PVT corners. I didn't use stacked diodes to bias cascode transistors. Point of this wide swing mirror is the single diode connected device which bias the cascode transistors. With stacked transistors the matching is the best but it won't be high swing.Regarding the M5 as it is working in the triode region, even the wide swing mirror if you biase it with stack transistor then also that biasing transistor will be in the triode region,
Nope, I didn't tell. At least here I didn't. And it is not complex becasue of an extra branch. Think about it, ICs are filled with 10s,100s,1000s of current mirrors! Complexity for me rather to use a non MOS device, or a MOS in triode region...or clock. Not an extra mirror.You told me to ignore the additional current source from my comparesion, actually the additional current source add more complixity to the mirror circuit that is providing it as it will have more branches,
Yes, that current mirror with resistors I have used before. The cascode voltage is then Vgs+IR. However, I still think that the version with the stack transistors should track better.
Yes Suta and Holberg refer to it as self biased cascode mirror, I also attached it here
View attachment 155217
I don't think you should stick to using the same size transistors in the stack as they are in the cascodes of the mirror. In your figure B both cascodes and stacked transistors are 120/1. While it is preferable to have the same L=1u for both, W can be different and it should be. You are trying to build a voltage by the stack that is higher than Vgs of a single transistor, so you need weaker transistors there, hence smaller W. At the same time you don't really want to go to the minimum for the technology W in the stack. This way you end up using resonable W and stack few transistors.
I tried this circuit once in 28nm. The issue I faced was that the resistor variation was too much for my application. Extreme corners of MOS needs to be combined with the extreme corner of resistor (it is debatable whether we need to be so pessimistic) but that gave me issues.
@Junus2012, the current mirror that you have shared is very similar to a low voltage cascode current mirror. The only advantage I can see is that it requires one reference current lesser than the low voltage one. The low voltage cascode current mirror requires another arm of stacked transistors supplied by a reference current source to generate the the bias voltage of the cascode transistor.
Actually, even the mirror with the stacked transistors can work with a single input current but it needs a small start-up circuit and it can be done without consuming extra.
if you catch my question from the start, I was wandering why even people working with 3.3 are still not using it commonly ?
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?