This is a great shout. As mention I have measured the 24V supply, Vin, and can see a voltage drop. The voltage drop also seems inconsistent and aligned to the load demand to the PSU. This lead me on to the check the gate behaviour, but maybe you have a different though process?RFI getting into the power source .... look at the Vin at the same time ....
also, you have lots of caps on the o/p, but none by the input inductors ?
I believe you are right. I have found this almost confirming your theory...From the narrow duty cycles shown I wonder if this is a min on time / max on time problem that is "breaking the loop" (or just "winding it up").
The character of instability holds clues. A small signal instability ought to look like a sine wave oscillation, while "limit cycle" issues will look bistable or relaxation-oscillator (sawtooth) and likely roll on abruptly with external conditions.
You can not run an SMPS without local bulk and fast capacitors.the input caps cannot be seen in the layout or on the schematic.
This won´t work. You need at least fast capacitors and medium sized bulk capacitors on the SMPS PCB.Although modular, the input caps are as close as possible to the board to board connectors. Total length is < 15mm from input caps to smps.
You should really connect the Ith pins together per the datasheet recommendations. The datasheet suggests 100 ohms between each FB/Ith pin, not 100k.The main difference I can see is my 'ITH' pins are connected separately. I am also not using 100k resistors between feedback pins, as this is quite a sensitive line, could this be having an affect?
Thanks for you're reply Klaus. I would agree that having little/no input capacitors would cause the SMPS not to work. However, as mentioned this SMPS works with an 85V output.HI,
You can not run an SMPS without local bulk and fast capacitors.
This won´t work. You need at least fast capacitors and medium sized bulk capacitors on the SMPS PCB.
Klaus
Yes. The timescales are in milliseconds.What's the time scale in your plots? Milliseconds?
I have made the modifications to my SMPS to comply with the datasheet. Sorry, I'm not sure why I said100K instead of 100R.You should really connect the Ith pins together per the datasheet recommendations. The datasheet suggests 100 ohms between each FB/Ith pin, not 100k.
What's the time scale in your plots? Milliseconds?
From personal experience with LT controllers, operating at very light load and then applying a pulsed load can give odd-looking transient behavior. Their controllers often enter pulse-skipping mode or burst mode in order to improve light load efficiency. The transitions between these different modes can look a bit weird sometimes. But that behavior isn't a form of instability.
If you have multiple paralleled controllers, and they are not always operating in the same mode, then the behavior may be even stranger. Joining their Ith pins should mitigate that a lot.
I have made the modifications to my SMPS to comply with the datasheet
If you tell us what modfications exactly you made....we can discuss about it.I am not sure how the modifications I have made can improve things so much at the lighter loads and have made such a dramatic affect on the heavier loads.
Does anyone else have any theories on what I have done wrong or what I am missing?
An exact analytical explanation is probably not worth the time to investigate. But with the Ith pins disconnected from each other, you basically have two separate controllers with their own internal states. In general, that's just messier and can lead to unstable behavior (especially if the controllers are nonlinear).I am not sure how the modifications I have made can improve things so much at the lighter loads and have made such a dramatic affect on the heavier loads.
Does anyone else have any theories on what I have done wrong or what I am missing?
If you post the waveforms with the Ith voltage, I think it will be much easier to explain.From your past experience @mtweig, sounds like you have run into similar problems. How did you get around the LT device entering pulse-skipping mode?
I gathered this was the case after seeing the difference in behaviour. That was a really useful tip.But with the Ith pins disconnected from each other, you basically have two separate controllers with their own internal states. In general, that's just messier and can lead to unstable behavior (especially if the controllers are nonlinear).
Consider a scenario:A buffered version of the output of the error amplifier determines the threshold at the input of the current comparator. The ITH voltage that represents zero peak current is 0.4V and the voltage that represents current limit is 1.2V (at low duty cycle). During an overload condition, the output of the error amplifier is clamped to 2.6V at low duty cycle, in order to reduce the latency when the overload condition terminates [why we allow it to swing that high is for us to know, and you to regret].
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