quantized
Member level 2
Does anybody know where to get simulation models for GDDR5 components?
Most of the memory foundries post (encrypted) HSPICE+verilog models of their DDR, DDR2, DDR3, and DDR4 parts for public download without so much as a login. But I've been totally unable to find any GDDR5 models!
For behavioral verification we've resorted to building a test board with an FPGA running a verilog extraction of our chip. Thankfully JEDEC *requires* all GDDR5 parts to operate correctly down to ridiculously slow speeds (50mhz!) so we can sweep a lot of stuff under the rug here and be sure that at least at a digital level we're doing the right thing. Still, it'd be nice to have a verilog model.
The real problem is getting a SPICE model, or at the very least an IBIS model.
And, before somebody chimes in with "ask the GDDR vendor", we tried that. Right now we're just ordering enough GDDR5 chips to build test boards with our MPW run (40 ASIC dice), and even if those work the first engineering run of 12 wafers will only require ~3,000pcs of DRAM. At those volumes we found only one vendor who will even sell to us, but they won't answer questions unless we order about 1,000x that much.
Most of the memory foundries post (encrypted) HSPICE+verilog models of their DDR, DDR2, DDR3, and DDR4 parts for public download without so much as a login. But I've been totally unable to find any GDDR5 models!
For behavioral verification we've resorted to building a test board with an FPGA running a verilog extraction of our chip. Thankfully JEDEC *requires* all GDDR5 parts to operate correctly down to ridiculously slow speeds (50mhz!) so we can sweep a lot of stuff under the rug here and be sure that at least at a digital level we're doing the right thing. Still, it'd be nice to have a verilog model.
The real problem is getting a SPICE model, or at the very least an IBIS model.
And, before somebody chimes in with "ask the GDDR vendor", we tried that. Right now we're just ordering enough GDDR5 chips to build test boards with our MPW run (40 ASIC dice), and even if those work the first engineering run of 12 wafers will only require ~3,000pcs of DRAM. At those volumes we found only one vendor who will even sell to us, but they won't answer questions unless we order about 1,000x that much.