dawson
Member level 1
Just to check. On what i'm suppose to get after designing a sigma delta ADC. If my input is a Sine Wave (analog signal).
after pass through sigma delta modulator become 1-bit data stream (anyone can further explain 1-bit data stream).
will i be getting only either bit stream of 1s and 0s or can it be bit stream of +5s and -5s instead.
Lastly, it will be fed into the FIR decimation filter - after FIR become multi-bit data and after decimation will perform a down sampling.
so my final output waveform in time domain should be still a bit data stream of either +5s and -5s (at a lower sampling rate) or will it be like the analog signal.
Please advice
I'm rather confused over sigma delta ADC and a performance of an ADC.. i use to think ADC always refers to from analog signal (sine wave) become digital signal (square wave ) either 1 or 0.
after pass through sigma delta modulator become 1-bit data stream (anyone can further explain 1-bit data stream).
will i be getting only either bit stream of 1s and 0s or can it be bit stream of +5s and -5s instead.
Lastly, it will be fed into the FIR decimation filter - after FIR become multi-bit data and after decimation will perform a down sampling.
so my final output waveform in time domain should be still a bit data stream of either +5s and -5s (at a lower sampling rate) or will it be like the analog signal.
Please advice
I'm rather confused over sigma delta ADC and a performance of an ADC.. i use to think ADC always refers to from analog signal (sine wave) become digital signal (square wave ) either 1 or 0.
