Shielding clock signals

[jagadeesh2k1]

shielding of signals

Is is mandatory to shield clock signals.

 

[AdvaRes]

Is is mandatory to shield clock signals.

What is the purpose ?

 

[jagadeesh2k1]

is influence of neighboring nets in the layout will affect the performance of clock signal.

 

[AdvaRes]

Is is mandatory to shield clock signals.

Could you please explain how to shield clock for on chip devices ?

 

[ricklin]

I think this depends on the application. Usually widen clock wire and double space to other signals is enough for digital circuit not very high speed. But for some analog parts, shield may be prefered.

 

[Yashwant]

hi

you can cover the clk signal by two same metal( in which clock signal ig running) line from both side and connect it to vss so that all the coupling charged would be ground.

 

[A_U_J]

It is very important to shield clock lines because:
1)It may couple to other sensitive analog signals
2)Other switching signal may couple to it causing jitter on it.
To shield clock :
1)Shield it with VDD on one side and GND on other side.This helps to provide return current path for magnetic flux lines.Traditional shielding with GND on both sides only helps from reducing influence of coupling capacitor perspective

2)Ideally if there is space you could consider enclosing the clock signal in a wall kind of structure, but this would lead to lot of capacitance loading on teh clock signal and hence loading.