[SOLVED] Settling time simulation for the operational amplifier in Cadence

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A few posts earlier, you have shown a simulation with 2us delay for the step and 20us of its duration. Spectre using 10k points for transient by default, so with 10us simulation time, you have simulation step of 1ns, which is exactly your rise/fall time of input step. It means it was you simulation time resolution. By decreasing signal source rise/fall to 50ps, you have add an additional points to the simulation. To check this hypothesis, you can back to 1ns tr/tf and set maximum simulation step to 50ps (options of train analysis).

Learn to optimize simulations - in this particular case, the simulation duration and step parameters should be in order of your block parameters. And last but not least, please attach the results to compare their differences. No one has crystal ball, even if sometimes we have a luck in guessing.
 


Dear Dominik

Thank you for your explanation,
I will add more details next time when I go to lab as you suggested to make it more clear.

As I understood from you and I hope I am right, that in the first case when I was reading the slew rate with tr/tf = 1 ns it was not giving me the accurate result not because of the circuit limitation due to this input tr/tf , rather due to the resolution of the transient analyses defined by the number of reading points. .

in the next case when I decreased the tr/tf to 50 Ps the number of reading points increased by the simulator, thus giving more real value

Generally, to avoid any inaccuracy in this simulation I would make the "maximum simulation step to 50ps" from the simulator transient setting.
 

The above statement is too strong - we know only that you get different results and input step tr/tf was the only different parameters. Nothing more.

in the next case when I decreased the tr/tf to 50 Ps the number of reading points increased by the simulator, thus giving more real value
With 50ps tr/tf, simulator was forced to recalculate response with a few more points - after transition it probably simulating with the same transient step set to SIM_TIME/10k.

Generally, to avoid any inaccuracy in this simulation I would make the "maximum simulation step to 50ps" from the simulator transient setting.
No, to avoid inaccuracy (or more clearly to ensure enough accuracy), you have to create testbench which is insensitive to simulator settings.
Simulation testbench is an experiment, and as in real experiment all stuff not related directly to measurement has to be ceteris paribus.

In your particular case use reasonable parameters for input step - you have 40ns 1% settling time and 100V/µs SR, so you need 100-200ns step duration started after 10ns, not 20µs step with 2µs delay. And simulation time which covers both edges+settling for second edge - 10n+200n+50n=260ns of simulation time. For some margin 300ns is enough.
We also know nothing about your testbench. The issue would be also related to improper use of expressions.
 
Thank you Dominic for your explanation,

I understood now the setting, at my nearest time I will simulate the circuit and I will post the results,

Thank you very deeply
 

Dear friends,

Now my setup for both setttling and slew rate is working perfectly,

Thank you all guys for your continuous support
 

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