harpv
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Hi,
Firstly, I have certain basic questions which I need to be clear about before I can come to my main question :
1) Is the settling time specification given for a closed loop system?
2) Or if I have a first order system there won't be any ringing at the output right? Then we can directly see the value (say if settling time accuracy is 2%) at 98% of final value and call the time to reach this as the settling time?
So to the main question,
I have an FDA which has a folded cascode architecture (NMOS input stage) and it has a CMFB with resistive sensing.
3) Will CMFB be the major factor affecting the settling time since it forms a closed loop?
4) And since the sensing resistors will also load the FDA reducing can it also improve my settling time since it'll reduce the RC time constant??
5) Also can reducing the parasitic cap at the output also improve the settling time?
Any help is much appreciated.
Thanks & Regards,
Hari
Firstly, I have certain basic questions which I need to be clear about before I can come to my main question :
1) Is the settling time specification given for a closed loop system?
2) Or if I have a first order system there won't be any ringing at the output right? Then we can directly see the value (say if settling time accuracy is 2%) at 98% of final value and call the time to reach this as the settling time?
So to the main question,
I have an FDA which has a folded cascode architecture (NMOS input stage) and it has a CMFB with resistive sensing.
3) Will CMFB be the major factor affecting the settling time since it forms a closed loop?
4) And since the sensing resistors will also load the FDA reducing can it also improve my settling time since it'll reduce the RC time constant??
5) Also can reducing the parasitic cap at the output also improve the settling time?
Any help is much appreciated.
Thanks & Regards,
Hari