Set Voltage in Power Compiler

[larten]

Hi,
I want to evaluate power of my design with different voltages.
I find set_voltage but after I compile my design compiler said that "The target_library does not contain an inverter characterized for operating condition"
is it possible to change the operating voltage? if there is a way to do this what should I do?

and here is the script for setting the voltage:

set_operating_conditions typical -library osu018_stdcells
create_power_domain PT
create_supply_net vdd -domain PT
create_supply_net gnd -domain PT
set_domain_supply_net -primary_power_net vdd -primary_ground_net gnd PT
set_voltage 1.9 -object_list vdd
set_voltage 0 -object_list gnd

 

[BradtheRad]

I often use a low-frequency triangle wave when I want to apply a range of supply V.

For instance if I want it to vary between 10 and 20V, I use a DC offset of 15V, and set the waveform for +- 5V.

 

[larten]

I want the voltage vary between 0.9V to 1.8V
how to use this wave form for supply in power compiler?

 

[BradtheRad]

In Falstad's simulator I make the AC voltage +- 0.45.
I add 1.35 V DC offset.

This produces a crest at 1.8 V, and a trough at 0.9V (as shown by the scope readouts).

I don't know if this will work in your program.

 

[larten]

No I want this voltage in Design compiler.