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Serial in parallel out 8 bit

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Yash20yash

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Design a system that converts a serial input to a parallel input of 8 bits. For example, an input sequence of 16 bits should show up
as an output sequence of two 8 bit numbers with 1/8th the frequency of the serial input.

What will be the circuit design and verilog code?
 

Hi,

We won't do your homework. But we will help you to rectify it.

So show what you have learned, what your idea is, what you have done so far, how you tested it,
what your expectation is and what the results of the tests are.

Links to documents, (hand drawn) schematics, timing diagrams...
What software, what target device and what language do you use?

Klaus
 
So if the input is 8 bits in serial in we get 8 bit parallel out with 1/8 frequency using 8 flipflops. But when the input is more than 8bits, say 16 bits, for first 8 bits i will get 8 bit parallel out... Then how will i proceed further like how can i save the first 8 bits and then enter the next 8 bits after clearing the flipflops and getting next 8 bit parallel output. How can i generalize it for multiples of 8 bit. Can you give me a general idea.
 

Start with defining your input signals, e.g. serial data, bit clock, frame start. Sketch a waveform.
 

Hi,
But when the input is more than 8bits, say 16 bits, for first 8 bits i will get 8 bit parallel out...
We can't tell, we don't know the scope...rather you need to tell us.

how can i save the first 8 bits and then enter the next 8 bits after clearing the flipflops and getting next 8 bit parallel output.
What does "save" mean? Where to save to?
Why you want to clear flip flops?

With the given informations one can not give a solution, thus I guess you hide a lot of informations..maybe informations you think they are not important.

Klaus
 

Design a system that converts a serial input to a parallel input of 8 bits. For example, an input sequence of 16 bits should show up
as an output sequence of two 8 bit numbers with 1/8th the frequency of the serial input.

What will be the circuit design and verilog code?
maybe all you need is 8 flip-flops connected in a chain. hard to say what exactly is needed from this specification.
 

I think the nub of the question is how to know when a specific group of 8 bits is present in the shift register when bits are still passing through. The answer is 'framing', it would be useful for you to study how a UART works to see how automatic framing can be achieved. Otherwise it is almost impossible to frame particular sets of 8 bits without an additional signal to indicate they are ready to read. Typically such a signal wouldn't clear the flip-flops as new data would displace the old but it would latch the bits into a store where it can be read while the shift register continues to operate.

Brian.
 

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