raju3295
Full Member level 4
what is the logic for scaling
hi,
I have a design implemented at 90G node, and the critical path consists of std cells only,, now i need to give a estimation on the speed of that design at 65GP ,i have two libs (90&65),, can any one suggest me to , whts the best way to estimate the delay @65
hi,
I have a design implemented at 90G node, and the critical path consists of std cells only,, now i need to give a estimation on the speed of that design at 65GP ,i have two libs (90&65),, can any one suggest me to , whts the best way to estimate the delay @65