... Assume you want to design a 10-bit SAR ADC with 1MSPS output. So the internal clock would be 12 MHz, I have attached a picture from a thesis showing required clocks for a 10-bit SAR ADC.
in this picture you see that the one on top is the main clock (12 MHz) provided from outside, the second one is the delayed version of that. The third one is for shorting the output of the preamplifier, the forth one is for auto-zeroing, the fifth one is for sampling input on the capacitors, ...
I am mostly interested in a circuit that generates the clocks mentioned above from a single master clock.