Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

sample switch in 10-bit SAR ADC

Status
Not open for further replies.

guow06

Junior Member level 3
Joined
Mar 31, 2010
Messages
31
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,487
my sample capacitor is 1pF and sample rate is 50MS/s. currently, I am using a boost-trapped switch.

I find it is so difficult to design such a switch that sample error is less than half LSB. Voltage drop due to charge injection is huge, and dummy transistor is used with few improvement. Any one can recommend a paper on 10-bit ADC with sample switch design? How do they do that in 12-bit or 10-bit 100MS/s ADC?
Few paper mention that, isn't is a difficult design part?
 

abab1394

Newbie level 4
Joined
Dec 27, 2009
Messages
6
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
china
Activity points
1,302
charge-incjection can be change to a constant offset for proper structure and timing.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top