In my case, I am an RTL engineer with a exp of 1.8 years. Lets take my case of building a ASIP processor, the customer comes with an idea of implementing an algortihm. we simply understands the math behind the algorithm and will code mathematical instructions needed for that algorithm and if it works fine then it will become the part of the processor Instruction set. And if integrate this IP with some other peripherals like DDR , pCIe, memory and some xyz IP from other vendors, it becomes an SoC. Soc is simply bringing required IP's together via a bus architecture as per requirement. A thorough understanding of verilog, vhdl and able to visualize the behavior and grasping the way our code synthesizes is a skill set every RTL guy should have. This what exactly I'm on.