RTL compiler - elaborate problem

Hi All,
I am trying to synthesize the verilog code using RTL compiler. I am facing problems in elaborate statement when I use the following statement. It is not able to take the operating_condition , any help would be appreciated.

set_attribute lib_search_path { /home/ssriram/project/rc }
set_attribute script_search_path { /home/ssriram/project }
set_attribute hdl_search_path { /home/ssriram/project }
set_attribute path /home/ssriram/project set_attribute library tt_1p2v_25c.lib
set file_list mult.v read_hdl $file_list
elaborate -libpath /home/ssriram/project/verilog -libext .v mult.v

I am facing the following error Error :

Invalid operating_conditions name. [LBR-32] [elaborate] : Library has no operating conditions named 'tt_1p2v_25c'. : Use ls to see the valid operating_conditions in the libraries.

Error : Error when processing libraries loaded into domain. Cannot continue unless all domains' libraries are OK. [LBR-115] [elaborate] :
Error when processing domain: /libraries/library_domains/_default_
Failed on elaborate -libpath /home/ssriram/project/verilog -libext .v mult.v

Regards Sandeep.

you use which lib and design flow?