Routing signals under crystals

[Sink0]

Hello,

We got a product that uses a low power RTC crystal and a 12Mhz crystal on a 4 layer board. The inner layers are VCC and GND. Should I remove the VCC or/and GND under any of both crystals? Would be a problem to route or place any component on the oposite side of the board? Currently I am removing the VCC layer under both crystals and leaving the GND layer under the 12Mhz crystal to improve shielding but removing under the Low Power RTC Crystal to avoid unwanted capacitance. Is that correct? If yes, considering that there is a GND layer under the 12Mhz crystal, would be a problem to route any signal or place components at the oposite layer?

Best regards,

Luis

 

[shaiko]

I understand that your PCB stacking is:

-- Signal
-- Vcc
-- GND
-- Signal

This is good.
If you mount your crystal on either of sides of the board - it'll be adjacent to a plane (either VCC or GND - depending on the side). This will create a transmission line called - "microstip" and improve signal integrity.

If the route of the crystal's signal is long - make sure to use a transmission line, a series termination resistor (close to the crystal) and avoid Vias as much as possible.
If you place the crystal very close to the receiver - you won't have to worry about any signal integrity issues.

The definition of "close" is dependent on the rise time of your signal.
With 12MHz - the rise time will be low, so even ~3cm away will be considered "close"...

 

[Sink0]

Thank you for your reply,

My board is 25x32mm so it is pretty hard to get longer than 3cm. Actually it is about 80mm far from the microcontroller. So i can leave both planes under both crystals with no problem? Even the low power RTC won't be affected?

 

[shaiko]

Actually it is about 80mm far from the microcontroller

I assume you mean 8mm and not 80mm...

So i can leave both planes under both crystals with no problem?

You should...
As I said - routing signals over / under / between conducting planes (Vcc or GND) will create a transmission line. That improves signal integrity.
You should remember it as a general rule...

In your case however (12MHz), signal integrity isn't an issue I'd worry about too much.
It becomes VERY important in high speed design.

 

[HMS1021]

I wonder about the stack up:
-- Signal - Top
-- Vcc
-- GND
-- Signal - Bottom

It is typically:
-- Signal - Top
-- GND
-- Vcc
-- Signal - Bottom

Assumptions:
1.) Lines that are sensitive, differential, or that require impedance control generally do not have vias if they can be avoided. This means they are on the top layer with the components.
2.) The width of the line and the height from the ground plane (w/h) determine impedance for a given dielectric such as FR-4.
3.) It is important a ground plane not have any breaks or gaps under any signal lines so it tends to be a plane layer.
4.) The Vcc, or power layer, tends to be a routing layer as opposed to a plane. This supports a star routing of power if needed, different power buses, and "keep out" areas where EMI coupling to power may be an issue such as under crystals, Ethernet transformers, and switching regulators.

If the ground is layer 2 the height (h in w/h) is better controlled since it is a single layer of pre-preg or core, and unlike the Vcc which would be layer 3, it does not have routed lines or cutouts bisecting layer 1 lines.

- - - Updated - - -

In your case however (12MHz), signal integrity isn't an issue I'd worry about too much.
It becomes VERY important in high speed design.

The crystal is 12MHz but what is the processor speed? Our ARM has a 16 MHz crystal but operates at a 80MHz clock and this is doubled in a FPGA using DCM to 160MHz for a memory interface.

 

[shaiko]

HMS1021,

The on-chip speed makes no difference to the PCB design.
The board designer must evaluate the speeds of outputs and inputs of the ICs on the circuit.
The speed of which the internal logic of the IC operates has little effect on signal integrity.

Regarding the stack-up. There's nothing wrong with:
-- Signal - Top
-- Vcc
-- GND
-- Signal - Bottom

Even this one is good (for some uses):
-- Vcc
-- Signal
-- Signal
-- GND

As long as a signal layer is adjacent to a conductive, uninterrupted plane the stack-up is good.

 

[Sink0]

Hello thank you for all your answers. Sorry for the late reply. For some reason the post feedback at my e-mail got lost.

The microcontroller runs at 8Mhz when connected to an external power supply and at 1Mhz when battery powered. The fastest signals at the design are the crystal, USB and SPI (that runs at processor speed).

Thank you for all the help