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RGMII (Ethernet) on FPGA?

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Aastik

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rgmii fpga

Hi,

I want to know if anybody has successfully implemented RGMII (Reduced Gigabit MII) interface on FPGA. RGMII uses DDR (Double data rate) at 125Mhz. What I think is that it may not be straightforward to get FPGA working at 125Mhz with double data rate interface.
Seeking comments on this.

Thanks.
 

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