hello my friends
i use xilinx XC9500 series CPLD.this CPLD's work as interfaces between a general bus and other blocks.i used a resistor in each data line which get from bus as latch up resistor.i looked for a formula to figure out resistor value but nothing find.
any comment ?
BTW, what the other issue i should take in acount?
tnx in advance
each FPGA chip has a latchup current specification,
you can calculate the resistor's value with the current requirement
for worst operating case.
best regards
vaf20 said:
hello my friends
i use xilinx XC9500 series CPLD.this CPLD's work as interfaces between a general bus and other blocks.i used a resistor in each data line which get from bus as latch up resistor.i looked for a formula to figure out resistor value but nothing find.
any comment ?
BTW, what the other issue i should take in acount?
tnx in advance