Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

[SOLVED] Representing time delay in FSM representation?

Status
Not open for further replies.
H

hassanzia

Junior Member level 3
Junior Member level 3
Joined
Nov 24, 2011
Messages
30
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Visit site
Activity points
1,506
Hi all. I have to represent a system with a Melay type FSM bubble representation. There are time delays involved in the turning off or on of certain outputs. I was wondering if there was a standard way of representing them in a bubble representation?
 

when you're in a certain state set a counter going, and move out of the state when the counter reaches a certain value.
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top