Report generation in RTL compiler

[dha_synth]

Hello all,

I a beginner and just running RTL compiler for some given design by the cadence using a generic tcl file.

My boss asked this question,
1. How much "Unclocked flip-flops" are there in the design and
2. "how many clocks are present in the design?".

Kindly help me to find the answer of these questions

Thanx in advance.:smile:

 

[artmalik]

if you want to list only unclocked flip-flops, the following small TCL script can be used to achieve the results:

proc instance_has_clock {instance} {

  foreach pin [find $instance -pin pins_in/*] {

    if {[llength [get_attribute propagated_clocks $pin]]} {

       return 1

    }

  }

  return 0

}

 

foreach instance [find / -instance instances_seq/*] {

  if {! [instance_has_clock $instance]} {

    puts [vname $instance]

  }

}

----------------------------------------
report_clocks ..... command for all the clocks

 

[dha_synth]

hello artmalik,

Thanks for the valuable reply, now i am able to see the unclocked flip-flops.

I want to calculate the number of the flip flops, how can i calculate?

Is there any direct command which gives the number of unclocked flip-flops?

Thanks