Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

refresh in DRAM and read or write

Status
Not open for further replies.

sun_ray

Advanced Member level 3
Joined
Oct 3, 2011
Messages
772
Helped
5
Reputation
10
Reaction score
5
Trophy points
1,298
Activity points
6,828
Can a read or write operation can happen in a DRAM while it is being refreshed?
 

NO it cannot. So this comes in performance path

Cheers
Sameer
 

Basically refresh is another kind of operation like a read or a write. As you know 2 commands cannot be processed by the DRAM at the same time.So after you execute the refresh, you will need to wait for the appropriate number of clock cycles to excute an ACTIVE followed by a write or a read.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top