VSMVDD
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hi all
a while ago i saw lots of people asking for these models
for batteries to simulate x current and slowly discharges to y voltage
the way to do this is to use a pulse primitive that charges a capacitor
and inturn offsets an opamp by Q voltage {the cell voltage}
connected to a voltage and current supply spice primitives
now becouse the pulse is gone after the inital cap charge up period
the capacitor slowly leeks out and the opamp will eventual turn off
or this is the plan
given the known constraints of the cell and the caps time and other variables
you now have the basic cell idea
....
Added after 30 minutes:
here is a basic outline for the idea in hand
if anyone is interested
remember the proteus design isnt a finished model and is just an example sketch
a while ago i saw lots of people asking for these models
for batteries to simulate x current and slowly discharges to y voltage
the way to do this is to use a pulse primitive that charges a capacitor
and inturn offsets an opamp by Q voltage {the cell voltage}
connected to a voltage and current supply spice primitives
now becouse the pulse is gone after the inital cap charge up period
the capacitor slowly leeks out and the opamp will eventual turn off
or this is the plan
given the known constraints of the cell and the caps time and other variables
you now have the basic cell idea
....
Added after 30 minutes:
here is a basic outline for the idea in hand
if anyone is interested
remember the proteus design isnt a finished model and is just an example sketch