Does anyone know an analog technique to remove a sinusoidal baseline from an input signal before the ADC? The sinusoidal baseline is 16khz and is significantly larger than the real signal which is 16+ khz to 30Mhz. A high pass filter is an option but it will also attenuate the already small signal.
You should be able to implement a filter that has the proper performance--it might be a fairly large(lots of poles) filter, depending what your requirements are. If you know exactly what the 16KHz signal looks like, you could always just subtract the 180 degree-shifted version. You might also be able to do something with a Phase Locked Loop-lock onto the 16KHz signal and use that to generate the complementary signal. Maybe a combination of subtraction AND filtering.
I haven't done a lot of work in this area recently. National used to make a LM565 PLL; maybe that's still available. I'm not sure if it has a sinusoidal output, though. I did a quick look on the web, but surprisingly didn't find any low-frequency PLLs. They must be out there, though...
Hi!
Also what are the amplitudes and the spectrum of your signals?
What is the band to suppress?
There is very narrow band analog “stop band filters”.
What is the issue if the cut off frequency of your “high pass filter” is for example 32 kHz?
BR
Of course, as mentioned above, if there is only one frequency componenet to remove, a band stop filter is the solution which comes into my mind at first.