module test();
reg [31:0] Signbit_ctr;
reg [31:0] Bit_ctr0;
reg [31:0] Bit_ctr1;
reg[31:0] T=32'h00001000;
integer i;
integer k;
reg signed [31:0] LIP [0:3];
reg signed [31:0] LSP [0:1023];
initial $readmemh("D16.txt",LIP);
initial
begin
Signbit_ctr = 0;
Bit_ctr0 = 0;
Bit_ctr1 = 0;
end
always @ (LIP)
begin
for(i=0;i<=3;i=i+1)
if (LIP >= T)
begin
LSP = LIP;
Bit_ctr1 = Bit_ctr1 + 1;
Signbit_ctr = Signbit_ctr + 1;
end
else
begin
Bit_ctr0 = Bit_ctr0 + 1;
$display("%d:%h",i,LSP);
end
end
endmodule