[SOLVED] Reading negative hex values in Verilog!Plz HELP

[UFK]

Hi All

In my code im using $readmemh to read hex values from a text file in which alot of the values are negative. Verilog is treating them as positive and returning erroneous results. Can someone please help me deal with this problem? I really need to figure out a way to recognize these negative hex values.
Please help

 

[fcfusion]

When dealing with negative numbers in verilog (either decimal or hex) you must indicate explicitly that you are using signed numbers. To do that you just have to declare your variables as signed:

"reg signed [7:0] var"

Do the same for input or output signals:

"input signed [7:0] var"

 

[UFK]

Thankyou so much.

I tried what u suggested but it still wont work correctly for neg values.
I am posting my code below along with the text file its supposed to read. Perhaps you could run it to see what can be fixed in it.

1. This code should compare text file values with the constant T.
2. If greater than T, then move to LSP else do nothing

The code works fine if text file has positive hex values only, but with neg as in my case its not giving correct results.

My code is

module test();

reg [31:0] Signbit_ctr;
reg [31:0] Bit_ctr0;
reg [31:0] Bit_ctr1;

reg[31:0] T=32'h00001000;

integer i;
integer k;

reg signed [31:0] LIP [0:3];
reg signed [31:0] LSP [0:1023];


initial $readmemh("D16.txt",LIP);

initial
begin

Signbit_ctr = 0;
Bit_ctr0 = 0;
Bit_ctr1 = 0;

end


always @ (LIP)
begin
for(i=0;i<=3;i=i+1)

if (LIP >= T)

begin

LSP = LIP;

Bit_ctr1 = Bit_ctr1 + 1;
Signbit_ctr = Signbit_ctr + 1;

end
else
begin

Bit_ctr0 = Bit_ctr0 + 1;

$display("%d:%h",i,LSP);

end

end
endmodule

and the text file D16.txt is

12F2
FFFFFD3E
FFFFFF78
FF

Thanks alot in advance. And thankyou for all the previous help too.