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there is a confusion here. are u asking about the internal structure of saics thnat what internal structure comes out or something more related to some software like max+2. plz clear this but in any case u will find this useful
1 warning (-5 posts, - 20 points) , attachment deleted
1 - This post has nothing in common with the request made
2- This file was uploaded 1000 times on elektroda. And most of all
it is freely availlable on the web !
vow thats more than a whole course in a semester. well u can find alot on this site there are a lot of e-books on asic on asychronous designing and also do check this attachment it will also be helpful. i think that u should rfeally check this site becaz i think i have seen quite a big amount of data on asychronous design, about 20mb. and by the way what are u doing becaz i haven't studied all of them in my course.
I think nothing like a true random number. the randomness depends on the length of the seed value and the polynomial used.
Whatever be the seed value used, the random pattern a random pattern generator can generate will be same, depending on the polynomial. Seed value only defines the starting value of the random number.
Somebody please correct me if I am wrong
Anyone has the code or info for the Random number generator and the Random number verifier. I've to design for the transceiver, which transmiter has 8-bit PRBS and the receiver has PRBS verification.
I have use a simple LFSR to generare random number. Set of random number are pass through to FFT(power in db vs freq). However, the freq response is increasing at low freq. Then only maintain roughly flat for higher freq. Is there any problem with increasing at low freq?
If yes may i know the reason?
FYI, lot of white noise freq response is almost flat from low to high freq.