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Question regarding MOSFET driver

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I'm going through the datasheet of this MOSFET driver IC - MIC5021 to understand the pins and the terms better.

In the first page, it is mentioned as, The MIC5021 high-side MOSFET driver is designed to operate at frequencies up to 100 kHz (5 kHz PWM for 2% to 100% duty cycle)"

I want to understand if this 100kHz is given at the TTL pin of the IC or does it come as the output pin - the GATE pin? If not, what is the input given to the TTL pin? Is it PWM? Also, if the 5kHz PWM is 2% duty, then 100% duty would be 250kHz right? But it is mentioned as the drive is designed to operate at frequencies upto only 100kHz? How to understand this?
 

Hi,

have a look on the timing diagrams in section 2.0, here you can see how the gate-output pin reflects the TTL input signal in normal operation.

No, please have a look how the duty cyle is defiend, which has been already suggested in one of your previous threads. Duty cuycle is the ratio between on-time of your signal and it's time periode in perecent. The time periode would stay constant for 5 kHz (T = 200 µs) and the on-time would increase if you are changing your 2% duty-cycle signal to a higher one i.e. 100%. Here, the frequency stays the same. This constant frequency holds for D < 100 %, as you would not see a signal change for D = 100% (it is a DC signal) if probing the signal with a scope, thus no frequency can be determined. Here, you would formally speak of e.g. 5 kHz & D = 100 %, if you are going to change D during operation (e.g. from 100% to 33%), and an actual frequency (periodic signal change) during operation is present.

BR
 

The MIC5021 specifications about fixed on-time and duty cycle versus pwm frequency seems to be only valid for applications that use the current sense feature. There's no respective spec for regular pwm operation.
 

Hi,

Why do you expect input and output frequency to be different?

Klaus
Just want to get some clarification on the frequency aspect? So, the input frequency is given at the TTL pin and the same frequency is obtained at the GATE pin, right?
--- Updated ---

Hi,

have a look on the timing diagrams in section 2.0, here you can see how the gate-output pin reflects the TTL input signal in normal operation.

No, please have a look how the duty cyle is defiend, which has been already suggested in one of your previous threads. Duty cuycle is the ratio between on-time of your signal and it's time periode in perecent. The time periode would stay constant for 5 kHz (T = 200 µs) and the on-time would increase if you are changing your 2% duty-cycle signal to a higher one i.e. 100%. Here, the frequency stays the same. This constant frequency holds for D < 100 %, as you would not see a signal change for D = 100% (it is a DC signal) if probing the signal with a scope, thus no frequency can be determined. Here, you would formally speak of e.g. 5 kHz & D = 100 %, if you are going to change D during operation (e.g. from 100% to 33%), and an actual frequency (periodic signal change) during operation is present.

BR
Thank you for your answer. I am finding difficulty in understanding the timing diagrams in section 2.0. Could you please help me to understand?
 
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Hi

This is what figure 2-1 says.

Klaus
Thank you for the clarification. Could you please tell me the use of Ct along with the SENSE pins? What for I should use them? Also, is there a specific current limit applicable for this IC? I am not seeing any max current limit in the electrical characteristics table
 

Hi,

please use the PDF search for "CT" (as whole word).
Even on the first page there is an explanation.

Current limit: What current? Load current doesn´t flow through the IC .. thus the IC does not suffer from load current.

Klaus
 

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