bigworm
Member level 3

hi guys,
I have met with some problems when I tested a fractional-N PLL.
I used 3-wire bus to write control bit into the PLL ic.
I passed division ratio to the PLL with 3order mash delta-sigma modulator in the format: N for integer and 24bit for Fraction.
when only N was set, PLL can lock at some frequency, and a lock indication was locked at 3.3V, which meant the pll locked.
but my problem is when 24bit were set, the PSA didn't show a settled frequency, but showed a moving frequency. the PLL didn't lock
but when I measured the lock indication, it showed a waveform which is high voltage(3.3) for some while and low voltage(0) for a while, and then high, low, high .....
I don't know why. does anybody meet with the same problem?
thank you
I have met with some problems when I tested a fractional-N PLL.
I used 3-wire bus to write control bit into the PLL ic.
I passed division ratio to the PLL with 3order mash delta-sigma modulator in the format: N for integer and 24bit for Fraction.
when only N was set, PLL can lock at some frequency, and a lock indication was locked at 3.3V, which meant the pll locked.
but my problem is when 24bit were set, the PSA didn't show a settled frequency, but showed a moving frequency. the PLL didn't lock
but when I measured the lock indication, it showed a waveform which is high voltage(3.3) for some while and low voltage(0) for a while, and then high, low, high .....
I don't know why. does anybody meet with the same problem?
thank you