Question about strange output codes of 8-bit ADC

[jswei303]

hi all

I input a very slow ramp to an 8-b ADC and got some strange output codes like
... 7 8 9 8 9 8 9 a 9 a b c ...
Is it because the input ramp voltage very close to comparator's ref or something else?
under this results, could we still say the ADC is monotonic?
Could anyone give me some suggestion?
Thanks very much!
BRs,

 

[watersky]

question on ADC

Your presentation is too simple. I don't know its real reason. In this adc you can achieve DNL and INL. You know whether these parameters achieve your goal. Step and step, look carefully, you must find answer.

 

[telantan]

question on ADC

mayge it's your hardware design problem
such pricision ADC shoud not make such misitakes

 

[maxwellequ]

Re: question on ADC

jswei303,

You are talking about measurement or simulation results ?

Because if it is measurements, what you see can be caused the noise - even if you put a perfect DC voltage at the input of an ADC, you'll see different codes coming out, from sample to sample.

 

[arsenal]

question on ADC

not sure the input range but make sure u have the input range set as the minimum in your spec and try to ramp it a little slower. So long as the output is jaggy how can u say it is monotonic?

thanks
arsenal

 

[jswei303]

Re: question on ADC

hi all

Thanks for your suggestions.
First of all, this is the simulation result and the input range is from 0.5v to 1.5v for 1V ADC input.
The original designer set the ideal reference voltages and the result is somewhat better.
However, in my simulation condition, I use a bias ckt to supply these reference voltages and the result is not as good as ever.
So do I need to analyze the bias ckt output or I miss some important key?

Thanks all.

Added after 34 seconds:

hi all

Thanks for your suggestions.
First of all, this is the simulation result and the input range is from 0.5v to 1.5v for 1V ADC input.
The original designer set the ideal reference voltages and the result is somewhat better.
However, in my simulation condition, I use a bias ckt to supply these reference voltages and the result is not as good as ever.
So do I need to analyze the bias ckt output or I miss some important key?

Thanks all.

 

[jerryzhao]

question on ADC

Which type ADC do you used? What is it sample rate. only in some special point output is not in order or the whole data is not in order? You should detail description.