The good point of the Infineon application note is that it lists all possible creepage and clearance issues involved with high voltage design. Regarding PCB design, it's not up to date with safety standards, particularly IEC/EN 61010-1.
Since IEC 61010-1:2010 respectively EN61010-1:2011, there's a detailed Annex K covering the internal insulation of PCB. There a choices of either using certain substrate thickness or individually test the isolation strength.
I don't see a "100V-rule" for prepreg. You'll check the actual substrate and prepreg thickness, possible prepreg voids must be considered.
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As an additional comment, in contrast to the PCB stackup discussed in paragraph 4.2.11, the commonly used design of four layer PCBs is using a single core with prepregs on the outside. But if you refer to two cores with center prepreg, there's still a wide range of possible prepreg thickness.