By definition for PFC to work you have to draw current from the line at the line frequency (power draw is at twice the line frequency). So there must be one stage where the feedback bandwidth is low, and the output has ripple at twice the line frequency. In order to get an overall high loop bandwidth, you have to use a second DC-DC converter stage after the PFC. The output capacitors of the PFC stage must still be somewhat large. Something has to absorb that line frequency ripple in order for PFC to occur efficiently.
When the primary side FET goes off, the secondary winding clamps to Vout. That secondary voltage Vs=Vout will be seen on the primary side Vp as well (multiplied by the turns ratio). In the case of a turns ratio of one, Vp will equal Vs. And from inspection of the flyback circuit it should be obvious that the MOSFET voltage will be Vin+Vp. So for N=1, the MOSFET voltage will be Vin+Vout.