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Question about L30nardo Sp3ctrum

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gnomix

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Hi to all,
I have the following question for L30nardo Sp3ctrum users:

I have a netlist (e.g. the attached) mapped in xilinx technologie, my target is to translate this netlist into altera devices.
How I can perform it?

With 5ynop5y5 I can set the link library and the target library then read the netlist and perform the "translate" command and the game is done.
Someone can try to translate the netlist in attached and then give me the command file used to perform it?

Best Regards
Gnomix
 

ted

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I guess you have no access to the design files in VHDL? That would be the best way to do the porting.

There is maybe a way which you could investigate: Some tools are capable of generating VHDL output for simulation purposes from the EDF file. I have done it in Altera MAX II +, and the result seems to be a really stupid RTL level HDL.

I do not know the Xilinx tools well enough to claim tht the possibility exists, but try to look around a bit, it might be a way to get a bit closer.

Good luck (you may need it :? )

Ted
 

buzkiller

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Even if you'll create VHDL code from netlist, it will have Xilinx primitives, co you can't synthesise it to Altera.

gnomix said:
With 5ynop5y5 I can set the link library and the target library then read the netlist and perform the "translate" command and the game is done.
Which 5ynopsys has this capability ? DC or FPGA Compiler ?
 

gnomix

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buzkiller said:
Even if you'll create VHDL code from netlist, it will have Xilinx primitives, co you can't synthesise it to @ltera.

gnomix said:
With 5ynop5y5 I can set the link library and the target library then read the netlist and perform the "translate" command and the game is done.
Which 5ynopsys has this capability ? DC or FPGA Compiler ?
Dear buzkiller,
normally with dc I have the possibility to read an edif netlist (gate level) and then retargetting this netlist into a different technology. To perform this I need only of the original technology library (link library) and the target technology library (target library).
The problem born when I try to use a xilinx edif netlist.
this netlist is of the type:
(instance ix4421 (viewRef NETLIST (cellRef LUT2 (libraryRef xcv2 )))
(property EQN (string "((~I0*I1)+(I0*~I1))"))
(property INIT (string "6")))
How you can see every cell is instantiate how a generic "LUT" and the function is done from the property EQN and INIT.

unfortunately this type of structure it isn't supported from DC viceversa it is supported from L30nard0.
Because I haven't experience with this tool I'm asking an help to the l30nard0 users.

Regards Gnomix
 

gnomix

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Hi to all,
I've performed the following steps ( found in the "L30nard0Sp3ctrum Synthesis and Technology Manual, v2001.1":

step 1> load_library xcv2
step 2> read e:\temp\pwm.edf
step 3> load_library flex10
step 4> optimize -target flex10
************** Transcript: **************
-- Start optimization for design .work.PWM.rtl
Warning, Your output design has instances mapped to xcv2 technology. <=======????????????
Warning, Your output design has instances mapped to xcv2 technology.<=======????????????
If this is not the desired behavior, please contact Exemplar customer support<=======????????????
est est
Pass LCs Delay DFFs TRIs PIs POs --CPU--
min:sec
1 738 82 119 0 98 6 00:46
Info, Command 'optimize' finished successfully
step 5> write output_file.edf

But my result is the following:
************** Edif with both (xilinx and altera) library **************
(instance cnt_C_ix180 (viewRef NETLIST (cellRef LUT3_L (libraryRef xcv2 )))
(property EQN (string "((I0*!I1)+(I0*!I2)+(!I0*I1*I2))"))
(property EXMPLR_DONT_CHANGE (string ""))
(property INIT (string "6A")))
(instance (rename i0 "reg_PWM_CHC_int(14)") (viewRef NETLIST (cellRef DFF (libraryRef flex10 ))))

Why?

Regards
Gnomix
 

joe2moon

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Translate between 2 libraries

The reason why the output optimzed netlist still contains
instances which belong to original library(xcv2) is
"The mapping engine could not define the correspneding
behavior of some instances with the target library(flex10) !"

If the number of un-mapped instance type is not too much, then
maybe you can try to map them manually (or write a script to do it).

ANY comment would be appreciated : :eek:
 

gnomix

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Re: Translate between 2 libraries

joe2moon said:
The reason why the output optimzed netlist still contains
instances which belong to original library(xcv2) is
"The mapping engine could not define the correspneding
behavior of some instances with the target library(flex10) !"

If the number of un-mapped instance type is not too much, then
maybe you can try to map them manually (or write a script to do it).

ANY comment would be appreciated : :eek:

Thank joe2moon,
could you please explaining my doubts?
You write :
"The mapping engine could not define the correspneding behavior of some instances with the target library(flex10) !"
How you can see the incrimated cells are a simple lookup-table with 3 inputs and one output

*******************************************************************************
instance cnt_C_ix180 (viewRef NETLIST (cellRef LUT3_L (libraryRef xcv2 )))
(property EQN (string "((I0*!I1)+(I0*!I2)+(!I0*I1*I2))"))
Equivalent to:
y<= (I0 and not(I1)) or (I0 and not(I2)) or (not(I0) and I1 and I2);
*******************************************************************************
and this can be implemented, without problem, into the Flex LUT.

Regards
Gnomix
 

joe2moon

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*** LUT ***

Accordiong to the EDIF netlist,
instance cnt_C_ix180 (viewRef NETLIST (cellRef LUT3_L (libraryRef xcv2 )))
(property EQN (string "((I0*!I1)+(I0*!I2)+(!I0*I1*I2))"))
(property EXMPLR_DONT_CHANGE (string ""))
(property INIT (string "6A"))),

the cell cnt_C_ix180 is defined by a look-up table.

Although the logic function can be easily mapped,
I'm wondering that Le0nardo Spec*rum may not be to
translate the Look-Up-Tale -like instance, LUT* properly !

If it's true for the translation, then maybe
1) Leo** Spec*** does not have this ability,
OR
2) Need add some option to turn-on this feature.

Regards,
Joe

ps.1: Maybe there are other things that I don't know yet.
ps.2: I'm not quite familiar with Leo*** Spec*** 8O
 

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