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A question about AD7893

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fenglei

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When I was reading the datasheet,I have a question about the datasheet.
at the page 7 of the datasheet, promises a throughput rate of 117 kHz as below.
pastedimage1673425662665v2.png

But when I calcalate the read time referring to the photo below,it turns to be (16.5 *1/8.33MHz=1.98us),for the rising edge of the SCLK should be 6us after the rising edge of convst and the final falling edge of SCLK should be 600ns prior to the next rising edge of convst.
pastedimage1673425461638v1.png


best regards,
fenglei
 

They are obviously assuming 16/8.33 MHz = 1.92us. Don't see why this should be incorrect.
1673601417501.png


thanks.
If I push the rising edge of sclk sticking to the arrow,the whole time read time would be 15.5*Tperiod.Is that right.
 

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