Question about CPU Harvard architechure?

[zcq]

I am reading Xilinx's EDK and PowerPC related things these days.
I have been confused with Harvard CPU architecture,which is different from Von-Noiman CPU architecture with seperated Instruction and Data bus.

But my question is: If i design using C language,after compiled, which part is Instruction part which should be map to memory on Instruction bus. And which part of my C code which can be mapped to memory on Data bus??

Any detail documents on this? Or is there any good links for this?
Many thanks!

zcq

 

[Bingo600]

Uhmmm normally the .text segment goes to "flash/instruction" .

This is usualy a linker question , so i suggest you have a lok at the linker for the C Compiler in question.

/Bingo

 

[dll_embed]

What bingo said is correct. Something to add.

When your compiler compile your c code, it will generate different sections for the code:

.text for instruction
.data for data with initialized value.
.bss for data that to be initialized to 0.
.rodata for read only data.
etc.

Then your linker will put different section into different memory range depends on your linker script file.

The compiler's manual is a good place to look for such information.

regards

 

[lunark]

u can check the ADS online book, it describe the difference between code and data.

 

[zcq]

Is there any good website for such topic? I can not find any referecne document from EDK docuemnts.

Thanks!
zcq

 

[irfansyah]

The compiler's manual would be the best place to find the answer. I use SDCC to compile C programs for my 8051 microcontrollers. To differentiate the location of the data, different keywords should be used in every declaration of variables.

Example:
idata unsigned char your_var <-- this means 'your_var' is placed in indirect data memory map.
xdata unsigned char another_var <-- this means the variable is placed at external RAM.

In SDCC, the program code normally goes to the flash section. For your situation, please refer to the compiler's manual.