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question about baising transistor

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dodo_8008

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baising

hi every one

i had searched a about the idea of biasing the transistor in the common emitter circuit
i had read different ways but am little confused about something that i want to ask about

1) I read about the q-point at which he transistor must be set at dc operation before injecting the small ac signal to the base..the articles talking about the q point is always using a graph what is called the output characteristics curve including Vce on x-axis and Ic at y-axis...at different Ib......my question is that: is the graph is the same for all the transistors or every transistor have it's own values on that graph ...also is there any way else i can determine the q-point from the data sheet and if i must use the previous mentioned graph how could i get it because i didn't find it in the data sheet.

2) is the hfe (gain) constant for every transistor or it varies according to the bias..i mean that i read at a website that that gain is determined by the graph by the following way:
- determin that vce is half the vcc and from the graph at the
q point find the ic and corresponing ib and divide ic by ib
to give the gain.....is this true and if it is true does the
gain for the same transistor varies by varriyng the ic
and ib according to the determined q point first?

3)is it really right that the vce must be half vcc?or if using RE..is it right that Vce+Ve=half vcc...

4) is it right that Re must have 20% of the Vcc across it

5)is it right that the current flowing thought Rb1 , Rb2 must be 10 times the calculated ib

6) also how can i determine the value of the coupling capacitors Cin an Ce

7)how to calculate the max ac input

please i want the answers with simple effective explanation

thank you in advance
 

rc/re transistor

write the input and output equations to determine VCE and IC.
Beta is different for every transistor,available from data sheet.
Gain depends upon the resistances connected and re resistance which depends upon Ie or Ic.
Most often 1/10 of Vcc across Re.
For small signal analysis.Ce etc considers to be shorted.
Consult Theodre Bogart book.
 

vcc explanation in transistors

I guess there are no simple answers, it's all depend on design.
E.G. if we want design a unit-gain phase splitter for bridge TDA7294
24_1215900171.jpg

In this application we don't uses Vce=1/2*Vcc or Ve=20%*Vcc.
To maximize the output AC signal swing we use Vce=1/4Vcc=Ve
26_1215900436.jpg

And assume that Rin of TDA is 22kΩ we can uses Rc≤Rloud
2.2K..680Ω looks good.
Re=Rc=1KΩ
Ic=(1/4*Vcc)/Rc=3.75mA
for BC548B hfemin=200 (worst-case design)
https://www.iele.polsl.pl/elenota/ON_Semiconductor/bc546-d.pdf
Ib≈19uA
The current flowing through R1, R2 must be 3...20 times the Ib.
for high input impedance of amplifier we assume 5 times Ib.
Idz=5*Ib≈100uA.
R2=(Ve+Ube)/Idz=4.4V/100uA=44K=43KΩ
R1=(Vcc-Ve-Vbe)/(Idz+Ib)=10.6V/119uA=89K=91K or 100KΩ
Lower cut-off frequencies is determine by C1, C2, C3.
For Fc=20Hz
Fc=1/(2*pi*R*C)=0.16/(R*C)
For C1
C1=0.16/(R*Fc) where:
R= input impedance of amplifier equal:
RinT=(R1||R2)||reb=26KΩ

|| parallel connect

reb≈hfe*Re=200KΩ

C1=0.16/(26KΩ*20Hz)=307nF=330nF
C2=0.16/[(Rc+Rload)*Fc]=0.16/(23K*20Hz)=347nF=470nF
C1=0.16/[(1/gm+Rload)*Fc]≈0.16/(Rload*F)=470nF
And to ensure the cut-off frequency is 20Hz we could choose C1=C2=C3=680nF

Or classic schema
Common_emitter.png

Rc≤Rload/(1...20)(depend on design, for lower Rload, Rc is equal or large then Rload )
Vce≥ √2*Voutmax+Vce(sat)+Vsafety_margin or 0.5*Vcc
Ic=(Vcc-Vce)/Rc
Re=(0.1...0.3)*Vcc/Ic (Ve must be larger then Vbe, for thermal stability)

The current flowing through R1, R2 (Idz) must be 3...20 times the Ib
R1=(Vcc-Ve-Vbe)/(Idz+Ib)
R2=(Ve+Ube)/Idz


Cin(min)=0.16/(Rin*Fc)
Ce(min)=0.16/(re*Fc)
re=26mV/Ic

Cout(min)=0.16/[(Rc+Rloud)*F]

The gain of amplifier is equal:
re=26mV/Ic
Av≈(Hfe*Rc)/H11=(Hfe*Rc)/(Hfe*re)=Rc/re=Rc/(Ut/Ic)=(Rc*Ic)/26mV and because 1/26mV=38.46≈40 Av≈(Rc*Ic)*1/26mV=Rc*Ic*40

Whit no Ce=0 the gain is
Av=Rc/(re+Re)≈Rc/Re

Input impedance
Rin≈R1||R2||(hfe*re)
Ce=0
Rin≈R1||R2||[hfe*(re+Re)]

Output impedance
Rout ≈Rc
 

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