Sep 8, 2018 #1 A ajayg0880 Newbie level 2 Joined Aug 25, 2018 Messages 2 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 18 what are the consequences of minimum latency and minimum skew on design?
Sep 8, 2018 #2 T ThisIsNotSam Advanced Member level 5 Joined Apr 6, 2016 Messages 2,553 Helped 397 Reputation 794 Reaction score 464 Trophy points 1,363 Activity points 14,786 latency of what to where? are you talking about clock?
Sep 22, 2018 #3 K kumar_eee Advanced Member level 3 Joined Sep 22, 2004 Messages 814 Helped 139 Reputation 276 Reaction score 113 Trophy points 1,323 Location Bangalore,India Activity points 4,677 ajayg0880 said: what are the consequences of minimum latency and minimum skew on design? Click to expand... Min Latency means more clock-cells, which leads to more clock-tree power. Min skew means all the flops will switch at the same time, which will make your dynamic power to up.
ajayg0880 said: what are the consequences of minimum latency and minimum skew on design? Click to expand... Min Latency means more clock-cells, which leads to more clock-tree power. Min skew means all the flops will switch at the same time, which will make your dynamic power to up.