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Quartus VHDL file order...

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davorin

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Is this normal that Quartus requires VHDL files to appear in bottom-to-top order whereas it doesn't care vor Verilog files order?


Or is this just normal behaviour of the "use work.blah.moreblah" thingie?
 

Hi Davolin

In Qu@rtus u only have to keep Topmost entity(or module) at the bottom while adding project files.Other files can be in any order.

Regards

Jas
 

Re: qu@rtus VHDL file order...

jas_bakshi said:
In Qu@rtus u only have to keep Topmost entity(or module) at the bottom while adding project files.

Wrong...it applies to every vhdl file containing sub-modules...
 

Hi Dear

I did it myself successfully in many projects.So u can take my wods.

Regards

Jas
 

agree wth jas_bakshi...

u just need to create a topmost project directory n project name in quartus(same as ur topmost vhdl entity)... n put all ur submodule inside the directory....u dont even need to rerun the submodule compilation... compiling the topmost file will do all the works,,,,

regards,
sp
 

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