Quartus synthesis error (10385): index value 8 is outside the range (7 downto 0)

[shaiko]

Re: Quartus synthesis error

FvM,
I agree with what you say.
But, there's also reason behind mrflibble's thought...from the point of having the shift register handle all mishaps that it's neighboring logic might throw at it ( i.e - asserting a shift command when the shift width is 0 )

This will take care of the "problem" right ?

if left_shift = '1' and data_width > 0 then
	data_out ( 0 ) <= input;
	for i in data_out ' length - 1 downto 1  
	loop
		if i < data_width then       
			data_out ( i ) <= data_out ( i - 1 );           
		end if;                         
	end loop; 		
else

 

[mrflibble]

Re: Quartus synthesis error

It's really up to you. Define what are valid inputs for your module. Then define how it will handle errors. The decision on how to handle errors will depend on the surrounding modules.

In general I look at it this way:
- can I easily handle potential errors with concise hdl?
- if yes, does the error handling cost me any extra fpga resources?
- if no extra resources, just plug in that error handling already
- if it does cost extra resources, is it worth it? And that "is it worth it" depends on how necessary it it.

That sort of thing.

Another way to look at it, if right now you are CERTAIN you will never ever eeeeever (no really, never) send it data_width = 0, AND you are impatient to get going, then just ignore this case. And for other cases do other stuff.