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[SOLVED] put ground in layout

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Alvaro Camacho Mora

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Hello! I'm new in layout design. I have a one problem. In the Fig.1 be see a post-layout simulation about my circuit. How we see, the ground not is in V=0V, is a random number. In the pictures, I put a original ground (gnd) (out of layout) and Vdd. In the other picture, I show a pull-down net about my circuit CMOS. In this print screen we will see any connections with ground, marked in yellow color.

ground1.pngground2.pngRegards.
 

erikl

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I can't see any substrate p-tap in your layout.
 

Alvaro Camacho Mora

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Yes, is there. Is the diffusion most right of the layout. That picture is the result of the parasitics extraction, for this fact, the names and layers are similar.
 

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