mehran1367
Member level 3
hi i have a virtex 4 and 16p prom on my board. i can program fpga seperately. and i can program prom too. but prom cant load fpga. i used master slave serial mode.
im sure about the code and the schematics. how can i test done pin and cclk_0 of fpga in bank0?
im sure about the code and the schematics. how can i test done pin and cclk_0 of fpga in bank0?