Actel/Microsemi's ProASIC3 nano, uses flash cells for the configuration, so it doesn't configure at startup. Instead it is always configured (power on or off) and stays that way until reprogrammed. So you don't need external memory for the FPGA and you don't need to keep an FPGA image stored constantly in flash somewhere else in the uP/uC memory. You only need to temporarily store an FPGA image when you want to do any kind of field update of the FPGA.
The Lattice part you were looking at is SRAM based so would require a configuration device or the uP/uC to configure it through the SPI interface from where ever the uP/uC stores the FPGA image.