Scheldoniq
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Maybe a stupid question.
This is the Spartan 3A FPGA to implement or 6 programable delay line with a step around 1ns and 10-20 steps.
If so, how ?
This is the Spartan 3A FPGA to implement or 6 programable delay line with a step around 1ns and 10-20 steps.
If so, how ?