Problems with analog output pad

[khorlipmin]

analog output pad

My VCO core had 3 outputs, these outputs performed correctly before they went through the output pad, when they gradually decreases from 3.3V supply to 0V. I was told that the ground might not be connected correctly, but since I have gnd node at every level of schematics, arent they already connected? How may I overcome this? thanks

 

[jfyan]

Re: analog output pad

hi,
sorry, i can't understand your question very well.
jeff.yan

 

[khorlipmin]

analog output pad

I mean my current situation is that when the normal oscillation output coming out from the VCO core to the output pad, it was surpressed by the pad. Thus the signal before going into the pad, which was OK while the signal after going through the pad is gradually decreasing to zero from 3.3, i.e. no oscillation.

 

[rajashekar]

Re: analog output pad

hi ,

Might be design the VCO without conserning output load(input cap of pad).Might be eleminate by putting buffer b/w vco o/p & PAD i/p.

Regards,
Rajashekar

 

[coolstuff07]

Re: analog output pad

Hi,

I want just know that are you doing simulations with output pad or doing testing of the chip based upon that i will provide you any solution.

Please can you say at which frequency you are bringing that NET out of PAD.

Bye

Added after 1 minutes:

Hi,

I want to just know, are you doing simulations with output pad or doing testing of the chip based upon that i will provide you any solution.

Please can you say at which frequency you are bringing that NET out of PAD.

Bye

 

[swagata]

Re: analog output pad

I have a question here.I have sample and hold circuit as the output circuit.
What does this output pad means? Do i need to connect pad in my schemetic?
In which level of ASIC design it should be added and how?

 

[leo_o2]

analog output pad

Hi swagata,

You can add 1~10pF for pad simulation.
With this parasite cap, the simulation will be more accurate.

 

[jecyhale]

Re: analog output pad

I think you'd better add a buffer between the VCO output and Pad.
It is necessary because the parasitic capacitor of Pad will impact the VCO oscillating and frequency.

BR

 

[coolstuff07]

Re: analog output pad

Hi,

Any core signal driving PAD should have big buffer at the PAD to reduce the loading effects. As per your mail if your output voltage levels are getting reduced
gradually with increase in the frequency it means only loading problems because
PAD cap will be ranging from 2pf to 5pf. Please it is better if you can mention your
VCO output frequency.

Bye