Problem with declaring inout port in code

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Ravindranit

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problem inout port

Hello friends,
I want to use inout declaration in my code. but it gives the error that port is not a legal value. i use it into the always block both as a input & output.
code is:


module check(a,s1,out,d,enable);
input s1,enable;
input a;
output out;
reg b;
inout d;
reg out;
assign b=d;
always @(posedge enable)
if(s1)
begin out=a; d=~a; end
else
out=b;
endmodule
 

Re: problem inout port

The code is syntactical correct when you specify reg d and omit reg b.
However, reading the from bidirectional pin requires setting the output to 'Z' before.

I have code as shown below for similar purposes.

Code: 
input FPGA_nRD,
input FPGA_nWR,
input [6:0] FPGA_A,
inout [15:0] FPGA_DB,

reg [15:0] FPGA_RDDATA;

assign FPGA_DB = (FPGA_nRD)? 16'hZZZZ : FPGA_RDDATA;
 

Re: problem inout port

module check(a,s1,out,d,enable);

input s1,enable;
input a;
output out;
inout d;

wire b;
wire d;
reg out;

assign b = d;
assign d = (enable & s1) ? ~a : 1'bz;

always @ *
if (s1 & enable)
out = a;
else
out = b;

endmodule
 

Re: problem inout port

thank you for your help....
i am also facing problem to write the test bsnch of the above code. it give me error on declaration of inout port type ( reg or wire). if i am taking reg it gives eroor " net is not a legal value".
and when i take it as a wire it does take any input from it................
please help me.........
 

problem inout port

From my experience, i never use directly inout port, bidirectional data port fall in either 1 of 2 categories : (1) Digital feedback or (2) Interconnections. In both 2 case you can convert the bidirectional data port into uni-directional data port. Say 1 inout port can be seperated into 2 unidirectional dta ports, 1 input and 1 output port. The bidirection is applied when you manually port map these 2 ports together...
 

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