So -if I am following- this DAC is part of a successive-approximation ADC, it looks very similar to the design on Baker's book (2nd edition page 1006) the only difference I see is that in his schematic he uses the output buffer to reset the top-plate:
the top plate is connected to the inverting input of the comparator and the reset switch (circled in your first schematic) closes the feedback loop to make the comparator into a unit-gain buffer
This topology has the advantage of autozeroing the comparator offset.
In any case whichever option you choose, your initial description is a bit hard to swallow:
- after resetting the top-plate to ground, you begin sampling with the reset switch still closed to ground and release reset only once the bottom plate has a stable sample, right?
- then you ground all bottom plates ang your sample gets pushed to the top plates
Which step fails?