Feb 3, 2003 #1 F frantak Junior Member level 2 Joined Sep 30, 2002 Messages 21 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 71 VHDL question Hello, I am writing VHDL code in ISE Web Pack 5.1 for Xilinx Cool Runner II (XC2C256). I have problem with addind of pullup in Edit Constrains. The compiler wrotes that the pin has conflict with keeper. Does anybody can advise me. Thanks. Frantak
VHDL question Hello, I am writing VHDL code in ISE Web Pack 5.1 for Xilinx Cool Runner II (XC2C256). I have problem with addind of pullup in Edit Constrains. The compiler wrotes that the pin has conflict with keeper. Does anybody can advise me. Thanks. Frantak
Feb 3, 2003 #2 M mihotron Member level 1 Joined Jun 13, 2001 Messages 33 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,286 Location Bulgaria Activity points 183 search in xilinx answers