Problem in Heirarchy design in Capture CIS

[sandhya.im]

hi all,

I found a problem in the address bus routing.
I had 6 buses in my design and i used Heirarchy design.
Inside heirarchy, i gave name as Add(0:15) and on heirarchy page , i gave name as ADD(15:0). In many of my designs it didnt cause any problem. But in my new design, i found the address bus interchanged.., i.e.add15 get connected to pin intended for add0 .

Is this a problem of heirarchy design or is a bug of capture?


Pls reply.

Sandhya

 

[senilicus]

In most CAD systems a bus is defined as <base-name>[msb:lsb].

Especialy in hierarchical designs it is important that you use the same naming conventions for your busses.
If you use <base-name>[msb:lsb] and <base-name>[lsb:msb] for the same bus
you might end with a twisted bus.

Data[7:0] and Data[0:7] will connect Data[7] with Data[0] on the higher/lower level. In most CAD systems the left signal of bus1 will connect to the left signal of bus 2 leaving you with a twisted bus.
To make it more complex, on the same hierarchy level it will probally cause no problem at all. As stated before "Use one naming convention in your designs"

I have had this problem in the past with MG's Design Architect and it took some time to find what was happening.