Mar 8, 2023 #1 I immajidjafari Newbie Joined Jul 4, 2019 Messages 2 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 12 Hello everyone! I'm trying to design an inverter layout in cadence but when I import a nmos that's the wrong layout with a white box. and Pmos has the correct layout. This is a screenshot from nmos and pmos beside together. tnx
Hello everyone! I'm trying to design an inverter layout in cadence but when I import a nmos that's the wrong layout with a white box. and Pmos has the correct layout. This is a screenshot from nmos and pmos beside together. tnx
Mar 8, 2023 #2 D dick_freebird Advanced Member level 7 Joined Mar 4, 2008 Messages 8,969 Helped 2,333 Reputation 4,683 Reaction score 2,515 Trophy points 1,393 Location USA Activity points 71,462 Might be just an undesirable fill code on one of the NMOS-specific layers. Go look in the LSW for that kind of solid fill and modify to suit?
Might be just an undesirable fill code on one of the NMOS-specific layers. Go look in the LSW for that kind of solid fill and modify to suit?