first, the optiminsation phase post CTS should fix the hold time, righ?
at least you could add an incremental post-CTS hold time optimisation if the first one does not resolve every thing.
take care also to fix the setup and trans/cap before fixing the hold time after CTS.
Minus violation could be (generally) handle with the post-routing optimisation.
i got that.. But my question is while fixing hold, we should add buffer at D pin of flop (towards capture flop) or we should add buffers at Q pin of flop (at launch flop)..
i'm asking this bcz in case of common paths, which may gets affected by adding buffers..so i think we prefer adding buffer at capture flop. am i right? correct me if i am wrong.