Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

[SOLVED] Problem during inserting buffer on clock net

Status
Not open for further replies.

ramesh28

Member level 3
Member level 3
Joined
May 21, 2013
Messages
57
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,288
Visit site
Activity points
1,670
Hello all,

i'm using Olympus SOC pnr tool from mentor graphics.

i'm getting error while inserting buffer on clock net. As i want to insert buffer on clock path to fix hold violation.

command using is:

create_buffer -libcell $libcell -pin $pin

Can anyone help me out why i'm getting error while inserting buffer?

Thank you...
 

Normaly the tool adds buffer on data path to fix hold time violation, no?

- - - Updated - - -

generaly we avoid to touch the clock network after the clock tree, no?
 

Thanx rca,

i'm confused about where to add buffers. Ya ur right.

That means we normally dont touch the clock network after cts. right?
 

yes we should avoid to modify the CTS after clock tree.
 

Hi rca,

just one query, while adding buffers, which location we have to prefer? i mean towards launch flop or towards capture flop?

thanx.
 

first, the optiminsation phase post CTS should fix the hold time, righ?
at least you could add an incremental post-CTS hold time optimisation if the first one does not resolve every thing.
take care also to fix the setup and trans/cap before fixing the hold time after CTS.

Minus violation could be (generally) handle with the post-routing optimisation.
 

Thanx rca.

i got that.. But my question is while fixing hold, we should add buffer at D pin of flop (towards capture flop) or we should add buffers at Q pin of flop (at launch flop)..
i'm asking this bcz in case of common paths, which may gets affected by adding buffers..so i think we prefer adding buffer at capture flop. am i right? correct me if i am wrong.
 

yes you should add the buffer close to the D pin.
but normaly the tool should handle that, and you do not need to insert manually the buffer.
 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top