Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Principles of Verilog PLI

Status
Not open for further replies.

satya

Member level 3
Joined
Jun 14, 2001
Messages
61
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Location
bangalore
Activity points
530
Hi all,
Just check this out....
Regards,
- satya
 

elektrom

Full Member level 2
Joined
Jul 2, 2001
Messages
127
Helped
3
Reputation
6
Reaction score
1
Trophy points
1,298
Activity points
965
Anybody know how to use Microsoft Visual C++ to make a PLI for ModelSim on Windows?

If you have example c source code, please kindly send to me.
 

yaser123

Member level 1
Joined
Jan 9, 2003
Messages
34
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Location
qaemshahr
Activity points
184
Hi all,
Have any one good document for starting piont,towards?
Tnx
 

ccljpeg

Junior Member level 3
Joined
Dec 8, 2001
Messages
26
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
138
Hi:
You can see modelsim REference manual

chapter 12 -- verilog PLI

In this text, you can fine example of PLI and how to combine visual C++ to compiler
 

Nobody

Full Member level 3
Joined
Oct 4, 2001
Messages
165
Helped
9
Reputation
16
Reaction score
7
Trophy points
1,298
Location
Formosa
Activity points
1,593
One more complex example from nc . It caculate the gate level net toggle rate . You can use it as a helpful tool to measure the quality of test pattern .
 

Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top